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2010-2012 Microchip Technology Inc.

DS39977F-page 181

PIC18F66K80 FAMILY

11.4

PORTC, TRISC and

LATC Registers

PORTC is an eight-bit wide, bidirectional port. The

corresponding Data Direction and Output Latch registers

are TRISC and LATC. Only PORTC pins, RC2 through

RC7, are digital only pins.

PORTC is multiplexed with CCP, MSSP and EUSARTx

peripheral functions (Table 11-5). The pins have

Schmitt Trigger input buffers. The pins for CCP, SPI

and EUSARTx are also configurable for open-drain

output

whenever

these

functions

are

active.

Open-drain configuration is selected by setting the

SSPOD, CCPxOD and U1OD control bits in the

ODCON register.

RC1 is configurable for open-drain output when CCP2

is active on this pin. Open-drain configuration is

selected by setting the CCP2OD control bit

(ODCON<3>).

When enabling peripheral functions, use care in defin-

ing TRIS bits for each PORTC pin. Some peripherals

can override the TRIS bit to make a pin an output or

input. Consult the corresponding peripheral section for

the correct TRIS bit settings.

The contents of the TRISC register are affected by

peripheral overrides. Reading TRISC always returns

the current contents, even though a peripheral device

may be overriding one or more of the pins.

EXAMPLE 11-3:

INITIALIZING PORTC

Note:

These pins are configured as digital inputs

on any device Reset.

CLRF

PORTC

; Initialize PORTC by

; clearing output

; data latches

CLRF

LATC

; Alternate method

; to clear output

; data latches

MOVLW

0CFh

; Value used to

; initialize data

; direction

MOVWF

TRISC

; Set RC<3:0> as inputs

; RC<5:4> as outputs

; RC<7:6> as inputs

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